PCB layout optimization using external LDO for low EMI

Seung Hee Ryu, Seung Baek Park, Soo-Won Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

LDOs are useful since LDOs do not generate switching noise, while synchronous DC-DC buck converters do. Because of this advantage, it is easy for designers to ignore the importance of the system-level PCB layout design. To control EMI at the output terminal of an LDO, the proper PCB layout is essential. This paper evaluates two types of power trace layouts for LDO test benches with a 10-layer stack-up PCB. Time-domain measurement of voltage at the output terminal of an LDO and an acoustic measurement were performed for the evaluation. The voltage drop decreased by 65 mV after the layout of the linear regulator output was revised.

Original languageEnglish
Title of host publication2015 IEEE International Conference on Consumer Electronics, ICCE 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages610-611
Number of pages2
ISBN (Print)9781479975426
DOIs
Publication statusPublished - 2015 Mar 23
Event2015 IEEE International Conference on Consumer Electronics, ICCE 2015 - Las Vegas, United States
Duration: 2015 Jan 92015 Jan 12

Other

Other2015 IEEE International Conference on Consumer Electronics, ICCE 2015
CountryUnited States
CityLas Vegas
Period15/1/915/1/12

Keywords

  • EMI reduction
  • LDO
  • System-level PCB layout

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Electrical and Electronic Engineering
  • Industrial and Manufacturing Engineering

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  • Cite this

    Ryu, S. H., Park, S. B., & Kim, S-W. (2015). PCB layout optimization using external LDO for low EMI. In 2015 IEEE International Conference on Consumer Electronics, ICCE 2015 (pp. 610-611). [7066548] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCE.2015.7066548