Performance comparison of real-time architectures using simulation

Heejo Lee, Kenji Toda, Jong Kim, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi

Research output: Contribution to conferencePaper

Abstract

This paper presents a performance comparison of real-time system architectures. A discrete event-driven, task-based simulator is developed for evaluating the performance of parallel and distributed real-time systems. Real-time system components such as processor, network architectures, and scheduling policy are included in the simulator. Simulation results show that priority-based communication and scheduling are more suitable for real-time systems than FIFO-based. The strategy of having a dedicated processor, which produces no effect on task execution by scheduling and packet/interrupt handling, is proven to enhance schedulability and predictability. This paper suggests a method for finding an appropriate real-time architecture for users having real-time requirements through the performance prediction of real-time systems.

Original languageEnglish
Pages150-157
Number of pages8
Publication statusPublished - 1995
EventProceedings of the 1995 2nd International Workshop on Real-Time Computing Systems and Applications - Tokyo, Jpn
Duration: 1995 Oct 251995 Oct 27

Other

OtherProceedings of the 1995 2nd International Workshop on Real-Time Computing Systems and Applications
CityTokyo, Jpn
Period95/10/2595/10/27

ASJC Scopus subject areas

  • Computer Science(all)

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    Lee, H., Toda, K., Kim, J., Nishida, K., Takahashi, E., & Yamaguchi, Y. (1995). Performance comparison of real-time architectures using simulation. 150-157. Paper presented at Proceedings of the 1995 2nd International Workshop on Real-Time Computing Systems and Applications, Tokyo, Jpn, .