Performance evaluation of GCC 4.7.1 on EISC

Miseon Han, Hokyoon Lee, Seon Wook Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In an embedded system, power consumption and execution time are important factors in performance. Code quality determines the performance factors, which is greatly influenced by a compiler. In this paper, we evaluate the performance of GCC 4.7.1 in comparison of that of GCC 4.2.2 on the EISC architecture with EEMBC in terms of the number of dynamic instructions and compiled code size. The results show that GCC 4.7 reduces 6.8% of the dynamic instructions, but increases 2.9% of code size from GCC 4.2.2.

Original languageEnglish
Title of host publication13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Print)9781479939428
DOIs
Publication statusPublished - 2014 Jan 1
Event13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Kota Kinabalu, Malaysia
Duration: 2014 Jan 152014 Jan 18

Other

Other13th International Conference on Electronics, Information, and Communication, ICEIC 2014
CountryMalaysia
CityKota Kinabalu
Period14/1/1514/1/18

Keywords

  • code size
  • compiler
  • GCC
  • instructions
  • optimization
  • performance

ASJC Scopus subject areas

  • Control and Systems Engineering
  • Electrical and Electronic Engineering

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  • Cite this

    Han, M., Lee, H., & Kim, S. W. (2014). Performance evaluation of GCC 4.7.1 on EISC. In 13th International Conference on Electronics, Information, and Communication, ICEIC 2014 - Proceedings [6914376] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ELINFOCOM.2014.6914376