Performance of ring oscillators composed of gate-all-around FETs with varying numbers of nanowire channels using TCAD simulation

In this paper, we investigate the performance of ring oscillators composed of gate-all-around (GAA) silicon nanowire (NW) field-effect transistors (FETs) with four different numbers of NW channels, for sub-10-nm logic applications. Our simulations reveal that ring oscillators with double, triple, and quadruple NW channels exhibit improvements of up to 50%, 85%, and 97%, respectively, in the oscillation frequencies (f_osc), compared to a ring oscillator with a single NW channel, due to the large drive current, in spite of the increased intrinsic capacitance of a given device. Moreover, our work shows that the f_osc improvement ratio of the ring oscillators becomes saturated with triple NW channels with additional load capacitances of 0.1 fF and 0.01 fF, which are similar to, or less than the intrinsic device capacitance (∼0.1 fF). Thus, our study provides an insight for determining the capacitive load and optimal number of NW channels, for device development and circuit design of GAA NW FETs.