Phase-locked loop with dual phase frequency detectors for high-frequency operation and fast acquisition

Youngshin Woo, Young Min Jang, Man Young Sung

Research output: Contribution to journalArticle

9 Citations (Scopus)

Abstract

The sequential phase frequency detector (PFD) has an unlimited error detection range and the precharge PFD has one and a half times better resolution performance than the sequential PFD. Therefore, by selective operation of the appropriate PFD connected to the well-adjusted charge pump, an unlimited error detection range, a high-frequency operation, and a higher speed lock-up time can be achieved. In this paper, we propose a phase-locked loop (PLL) with dual PFDs in which advantages of both PFDs can be combined. This structure can improve the tradeoff between acquisition behavior and locked behavior.

Original languageEnglish
Pages (from-to)245-252
Number of pages8
JournalMicroelectronics Journal
Volume33
Issue number3
DOIs
Publication statusPublished - 2002 Mar 1

Fingerprint

Phase locked loops
acquisition
Detectors
detectors
Error detection
tradeoffs
high speed
Pumps
pumps

Keywords

  • CMOS
  • Dual phase frequency detectors
  • Fast acquisition
  • High frequency
  • Low jitter
  • Phase-locked loop

ASJC Scopus subject areas

  • Control and Systems Engineering
  • Electrical and Electronic Engineering

Cite this

Phase-locked loop with dual phase frequency detectors for high-frequency operation and fast acquisition. / Woo, Youngshin; Jang, Young Min; Sung, Man Young.

In: Microelectronics Journal, Vol. 33, No. 3, 01.03.2002, p. 245-252.

Research output: Contribution to journalArticle

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