TY - GEN
T1 - Process variation-tolerant 3D microprocessor design
T2 - 2013 International Conference on IC Design and Technology, ICICDT 2013
AU - Kong, Joonho
AU - Chung, Sung Woo
PY - 2013
Y1 - 2013
N2 - Process variation is one of the most challenging problems for 3D microprocessors. This is because stacked dies are likely to have fairly different characteristics due to wafer-to-wafer (W2W) variations, which may severely hurt yield of 3D microprocessors. In this paper, we introduce a process variation-tolerant 3D microprocessor design that exploits an architectural insight: narrow-width values. The main target of our technique is last-level caches (LLCs), which are composed of several dies. By storing only the meaningful bit parts within a data word into the LLCs while discarding the zero bit parts (which can be recovered by the zero-extension logic), our proposed technique improves a storage efficiency of the LLCs, which eventually enhances cache yield. According to our evaluation results, our technique significantly improves cache yield in a performance-/energy-efficient manner.
AB - Process variation is one of the most challenging problems for 3D microprocessors. This is because stacked dies are likely to have fairly different characteristics due to wafer-to-wafer (W2W) variations, which may severely hurt yield of 3D microprocessors. In this paper, we introduce a process variation-tolerant 3D microprocessor design that exploits an architectural insight: narrow-width values. The main target of our technique is last-level caches (LLCs), which are composed of several dies. By storing only the meaningful bit parts within a data word into the LLCs while discarding the zero bit parts (which can be recovered by the zero-extension logic), our proposed technique improves a storage efficiency of the LLCs, which eventually enhances cache yield. According to our evaluation results, our technique significantly improves cache yield in a performance-/energy-efficient manner.
KW - 3D microprocessor
KW - last-level cache
KW - narrowwidth value
KW - process variation
KW - yield
UR - http://www.scopus.com/inward/record.url?scp=84883366728&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84883366728&partnerID=8YFLogxK
U2 - 10.1109/ICICDT.2013.6563300
DO - 10.1109/ICICDT.2013.6563300
M3 - Conference contribution
AN - SCOPUS:84883366728
SN - 9781467347419
T3 - ICICDT 2013 - International Conference on IC Design and Technology, Proceedings
SP - 45
EP - 48
BT - ICICDT 2013 - International Conference on IC Design and Technology, Proceedings
Y2 - 29 May 2013 through 31 May 2013
ER -