Abstract
As an effort, not a mutually exclusive but rather complementary to developing better backplane bus, this paper considers adapting distributed shared-memory (DSM) architectures to improve traditional shared-bus designs. We consider two well-known DSM architectures, namely Cache-coherent Non-Uniform Memory Architecture (NUMA) and Cache-Only Memory Architecture (COMA), in reducing bus traffic. Our study shows that COMA provides excellent opportunity of significantly reducing bandwidth requirement for the bus while cache-coherent NUMA provides a marginal improvement.
| Original language | English |
|---|---|
| Pages (from-to) | 867-872 |
| Number of pages | 6 |
| Journal | Journal of Systems Architecture |
| Volume | 44 |
| Issue number | 11 |
| Publication status | Published - 1998 Aug 1 |
| Externally published | Yes |
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Keywords
- Cache-only memory architecture
- Distributed shared-memory
- Non-uniform memory architecture
- Shared-bus multiprocessor
ASJC Scopus subject areas
- Hardware and Architecture
- Software
Cite this
Prospects of distributed shared memory for reducing global traffic in shared-bus multiprocessors. / Lee, Kyung Ho; Kong, Jinseok.
In: Journal of Systems Architecture, Vol. 44, No. 11, 01.08.1998, p. 867-872.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Prospects of distributed shared memory for reducing global traffic in shared-bus multiprocessors
AU - Lee, Kyung Ho
AU - Kong, Jinseok
PY - 1998/8/1
Y1 - 1998/8/1
N2 - As an effort, not a mutually exclusive but rather complementary to developing better backplane bus, this paper considers adapting distributed shared-memory (DSM) architectures to improve traditional shared-bus designs. We consider two well-known DSM architectures, namely Cache-coherent Non-Uniform Memory Architecture (NUMA) and Cache-Only Memory Architecture (COMA), in reducing bus traffic. Our study shows that COMA provides excellent opportunity of significantly reducing bandwidth requirement for the bus while cache-coherent NUMA provides a marginal improvement.
AB - As an effort, not a mutually exclusive but rather complementary to developing better backplane bus, this paper considers adapting distributed shared-memory (DSM) architectures to improve traditional shared-bus designs. We consider two well-known DSM architectures, namely Cache-coherent Non-Uniform Memory Architecture (NUMA) and Cache-Only Memory Architecture (COMA), in reducing bus traffic. Our study shows that COMA provides excellent opportunity of significantly reducing bandwidth requirement for the bus while cache-coherent NUMA provides a marginal improvement.
KW - Cache-only memory architecture
KW - Distributed shared-memory
KW - Non-uniform memory architecture
KW - Shared-bus multiprocessor
UR - http://www.scopus.com/inward/record.url?scp=0032136942&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0032136942&partnerID=8YFLogxK
M3 - Article
AN - SCOPUS:0032136942
VL - 44
SP - 867
EP - 872
JO - Journal of Systems Architecture
JF - Journal of Systems Architecture
SN - 1383-7621
IS - 11
ER -