@inproceedings{6a995d0775314fc6a7fdb8d2ce222fe1,
title = "RAPTOR: A single chip multiprocessor",
abstract = "A microarchitecture of a processor named RAPTOR is described. RAPTOR is a single chip multiprocessor developed for exploiting thread-level parallelism. RAPTOR includes four identical processors, a graphics coprocessor, and an external cache controller. Each processor has a 16 KB primary cache and implements SPARC version 9 instruction set architecture. The external cache controller provides direct connection to a large external second level cache. RAPTOR is designed as a building block of multiprocessor systems such as symmetric multiprocessor machines.",
author = "Lee, {Sang Won} and Song, {Yun Seob} and Kim, {Soo Won} and Oh, {Hyeong Cheol} and Hahn, {Woo Jang}",
note = "Publisher Copyright: {\textcopyright} 1999 IEEE.; 1st IEEE Asia Pacific Conference on ASICs, AP-ASIC 1999 ; Conference date: 23-08-1999 Through 25-08-1999",
year = "1999",
doi = "10.1109/APASIC.1999.824067",
language = "English",
isbn = "0780357051",
series = "AP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "217--220",
booktitle = "AP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs",
}