Abstract
Cache only memory architecture (COMA), even with its additional memory overhead, can incur longer inter/intra-node communication latency than cache-coherent nonuniform memory access (CCNUMA). Some studies on COMA suggest that the inclusion property applied between the processor cache and its local memory is one of the major causes of less-than-desirable performance. The inclusion property creates extra accesses to the slow local memory. We consider the binding time of data address to the local memory to be an important factor related to the long latency in COMA. This paper considers the inclusion property in COMA and introduces a variant of COMA, dubbed Dynamic Memory Architecture (DYMA), where the local memory is utilized as a backing store for blocks discarded from the processor cache. Thus, by delaying the binding time, the long latency due to the inclusion property can be avoided. This paper examines the potential performance of DYMA compared to COMA and CC-NUMA.
| Original language | English |
|---|---|
| Title of host publication | Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings |
| Publisher | Springer Verlag |
| Pages | 435-444 |
| Number of pages | 10 |
| Volume | 1124 |
| ISBN (Print) | 3540616276, 9783540616276 |
| Publication status | Published - 1996 |
| Externally published | Yes |
| Event | 2nd International Euro-Par Conference on Parallel Processing, Euro-Par 1996 - Lyon, France Duration: 1996 Aug 26 → 1996 Aug 29 |
Publication series
| Name | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) |
|---|---|
| Volume | 1124 |
| ISSN (Print) | 0302-9743 |
| ISSN (Electronic) | 1611-3349 |
Other
| Other | 2nd International Euro-Par Conference on Parallel Processing, Euro-Par 1996 |
|---|---|
| Country | France |
| City | Lyon |
| Period | 96/8/26 → 96/8/29 |
Fingerprint
ASJC Scopus subject areas
- Theoretical Computer Science
- Computer Science(all)
Cite this
Relaxing the inclusion property in cache only memory architecture. / Kong, Jinseok; Lee, Kyung Ho.
Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings. Vol. 1124 Springer Verlag, 1996. p. 435-444 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 1124).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
}
TY - GEN
T1 - Relaxing the inclusion property in cache only memory architecture
AU - Kong, Jinseok
AU - Lee, Kyung Ho
PY - 1996
Y1 - 1996
N2 - Cache only memory architecture (COMA), even with its additional memory overhead, can incur longer inter/intra-node communication latency than cache-coherent nonuniform memory access (CCNUMA). Some studies on COMA suggest that the inclusion property applied between the processor cache and its local memory is one of the major causes of less-than-desirable performance. The inclusion property creates extra accesses to the slow local memory. We consider the binding time of data address to the local memory to be an important factor related to the long latency in COMA. This paper considers the inclusion property in COMA and introduces a variant of COMA, dubbed Dynamic Memory Architecture (DYMA), where the local memory is utilized as a backing store for blocks discarded from the processor cache. Thus, by delaying the binding time, the long latency due to the inclusion property can be avoided. This paper examines the potential performance of DYMA compared to COMA and CC-NUMA.
AB - Cache only memory architecture (COMA), even with its additional memory overhead, can incur longer inter/intra-node communication latency than cache-coherent nonuniform memory access (CCNUMA). Some studies on COMA suggest that the inclusion property applied between the processor cache and its local memory is one of the major causes of less-than-desirable performance. The inclusion property creates extra accesses to the slow local memory. We consider the binding time of data address to the local memory to be an important factor related to the long latency in COMA. This paper considers the inclusion property in COMA and introduces a variant of COMA, dubbed Dynamic Memory Architecture (DYMA), where the local memory is utilized as a backing store for blocks discarded from the processor cache. Thus, by delaying the binding time, the long latency due to the inclusion property can be avoided. This paper examines the potential performance of DYMA compared to COMA and CC-NUMA.
UR - http://www.scopus.com/inward/record.url?scp=84947904656&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84947904656&partnerID=8YFLogxK
M3 - Conference contribution
AN - SCOPUS:84947904656
SN - 3540616276
SN - 9783540616276
VL - 1124
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 435
EP - 444
BT - Euro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings
PB - Springer Verlag
ER -