Relaxing the inclusion property in cache only memory architecture

Jinseok Kong, Kyung Ho Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Citations (Scopus)


Cache only memory architecture (COMA), even with its additional memory overhead, can incur longer inter/intra-node communication latency than cache-coherent nonuniform memory access (CCNUMA). Some studies on COMA suggest that the inclusion property applied between the processor cache and its local memory is one of the major causes of less-than-desirable performance. The inclusion property creates extra accesses to the slow local memory. We consider the binding time of data address to the local memory to be an important factor related to the long latency in COMA. This paper considers the inclusion property in COMA and introduces a variant of COMA, dubbed Dynamic Memory Architecture (DYMA), where the local memory is utilized as a backing store for blocks discarded from the processor cache. Thus, by delaying the binding time, the long latency due to the inclusion property can be avoided. This paper examines the potential performance of DYMA compared to COMA and CC-NUMA.

Original languageEnglish
Title of host publicationEuro-Par 1996 Parallel Processing - 2nd International Euro-Par Conference, Proceedings
PublisherSpringer Verlag
Number of pages10
ISBN (Print)3540616276, 9783540616276
Publication statusPublished - 1996
Externally publishedYes
Event2nd International Euro-Par Conference on Parallel Processing, Euro-Par 1996 - Lyon, France
Duration: 1996 Aug 261996 Aug 29

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349


Other2nd International Euro-Par Conference on Parallel Processing, Euro-Par 1996

ASJC Scopus subject areas

  • Theoretical Computer Science
  • Computer Science(all)


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