Reliable low-power digital signal processing via reduced precision redundancy

Byonghyo Shim, Srinivasa R. Sridhara, Naresh R. Shanbhag

Research output: Contribution to journalArticle

128 Citations (Scopus)

Abstract

In this paper, we present a novel algorithmic noise-tolerance (ANT) technique referred to as reduced precision redundancy (RPR). RPR requires a reduced precision replica whose output can be employed as the corrected output in case the original system computes erroneously. When combined with voltage overscaling (VOS), the resulting soft digital signal processing system achieves up to 60% and 44% energy savings with no loss in the signal-to-noise ratio (SNR) for receive filtering in a QPSK system and the butterfly of fast Fourier transform (FFT) in a WLAN OFDM system, respectively. These energy savings are with respect to optimally scaled (i.e., the supply voltage equals the critical voltage Vdd-cr it) present day systems. Further, we show that the RPR technique is able to maintain the output SNR for error rates of up to 0.09/sample and 0.06/sample in an finite impulse response filter and a FFT block, respectively.

Original languageEnglish
Pages (from-to)497-510
Number of pages14
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume12
Issue number5
DOIs
Publication statusPublished - 2004 May 1
Externally publishedYes

Fingerprint

Digital signal processing
Redundancy
Fast Fourier transforms
Signal to noise ratio
Energy conservation
Electric potential
Quadrature phase shift keying
FIR filters
Wireless local area networks (WLAN)
Orthogonal frequency division multiplexing

Keywords

  • Digital signal processing
  • Low-power
  • Noise-tolerance
  • Reliability
  • Supply voltage

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

Reliable low-power digital signal processing via reduced precision redundancy. / Shim, Byonghyo; Sridhara, Srinivasa R.; Shanbhag, Naresh R.

In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol. 12, No. 5, 01.05.2004, p. 497-510.

Research output: Contribution to journalArticle

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