RFTL: improving performance of selective caching-based page-level FTL through replication

Ronnie Mativenga, Joon Young Paik, Youngjae Kim, Junghee Lee, Tae Sun Chung

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

The internal nature of flash memory technology, makes its performance highly dependent on workload characteristics causing poor performance on random writes. To solve this, Demand-based Flash Translation Layer (DFTL) which selectively caches page-level address mappings, was proposed. DFTL exploits temporal locality in workloads and when low, high cache miss rates are experienced. In this paper, we propose a replication based DFTL, called RFTL, which aims at minimizing the overhead caused by miss penalty from the cached mapping table in SRAM. We developed an analytical model for studying the range of performance for RFTL. We extended EagleTree simulator to implement RFTL. Our experimental evaluation with synthetic workloads endorses the utility of RFTL showing improved performance over DFTL especially for read-dominant workloads. With 80% read dominant workload, RFTL’s cumulative distribution function shows a 20% improvement and under 80% write dominant workload, it outperforms DFTL by 10% on I/O throughput.

Original languageEnglish
Pages (from-to)25-41
Number of pages17
JournalCluster Computing
Volume22
Issue number1
DOIs
Publication statusPublished - 2019 Mar 15
Externally publishedYes

Fingerprint

Flash memory
Static random access storage
Distribution functions
Analytical models
Simulators
Throughput

Keywords

  • Cached mapping table
  • Flash memory
  • Flash translation layer
  • Solid-state drive

ASJC Scopus subject areas

  • Software
  • Computer Networks and Communications

Cite this

RFTL : improving performance of selective caching-based page-level FTL through replication. / Mativenga, Ronnie; Paik, Joon Young; Kim, Youngjae; Lee, Junghee; Chung, Tae Sun.

In: Cluster Computing, Vol. 22, No. 1, 15.03.2019, p. 25-41.

Research output: Contribution to journalArticle

Mativenga, Ronnie ; Paik, Joon Young ; Kim, Youngjae ; Lee, Junghee ; Chung, Tae Sun. / RFTL : improving performance of selective caching-based page-level FTL through replication. In: Cluster Computing. 2019 ; Vol. 22, No. 1. pp. 25-41.
@article{96f29b3925bb4015b9fb4fc1adcae5ba,
title = "RFTL: improving performance of selective caching-based page-level FTL through replication",
abstract = "The internal nature of flash memory technology, makes its performance highly dependent on workload characteristics causing poor performance on random writes. To solve this, Demand-based Flash Translation Layer (DFTL) which selectively caches page-level address mappings, was proposed. DFTL exploits temporal locality in workloads and when low, high cache miss rates are experienced. In this paper, we propose a replication based DFTL, called RFTL, which aims at minimizing the overhead caused by miss penalty from the cached mapping table in SRAM. We developed an analytical model for studying the range of performance for RFTL. We extended EagleTree simulator to implement RFTL. Our experimental evaluation with synthetic workloads endorses the utility of RFTL showing improved performance over DFTL especially for read-dominant workloads. With 80{\%} read dominant workload, RFTL’s cumulative distribution function shows a 20{\%} improvement and under 80{\%} write dominant workload, it outperforms DFTL by 10{\%} on I/O throughput.",
keywords = "Cached mapping table, Flash memory, Flash translation layer, Solid-state drive",
author = "Ronnie Mativenga and Paik, {Joon Young} and Youngjae Kim and Junghee Lee and Chung, {Tae Sun}",
year = "2019",
month = "3",
day = "15",
doi = "10.1007/s10586-018-2824-5",
language = "English",
volume = "22",
pages = "25--41",
journal = "Cluster Computing",
issn = "1386-7857",
publisher = "Kluwer Academic Publishers",
number = "1",

}

TY - JOUR

T1 - RFTL

T2 - improving performance of selective caching-based page-level FTL through replication

AU - Mativenga, Ronnie

AU - Paik, Joon Young

AU - Kim, Youngjae

AU - Lee, Junghee

AU - Chung, Tae Sun

PY - 2019/3/15

Y1 - 2019/3/15

N2 - The internal nature of flash memory technology, makes its performance highly dependent on workload characteristics causing poor performance on random writes. To solve this, Demand-based Flash Translation Layer (DFTL) which selectively caches page-level address mappings, was proposed. DFTL exploits temporal locality in workloads and when low, high cache miss rates are experienced. In this paper, we propose a replication based DFTL, called RFTL, which aims at minimizing the overhead caused by miss penalty from the cached mapping table in SRAM. We developed an analytical model for studying the range of performance for RFTL. We extended EagleTree simulator to implement RFTL. Our experimental evaluation with synthetic workloads endorses the utility of RFTL showing improved performance over DFTL especially for read-dominant workloads. With 80% read dominant workload, RFTL’s cumulative distribution function shows a 20% improvement and under 80% write dominant workload, it outperforms DFTL by 10% on I/O throughput.

AB - The internal nature of flash memory technology, makes its performance highly dependent on workload characteristics causing poor performance on random writes. To solve this, Demand-based Flash Translation Layer (DFTL) which selectively caches page-level address mappings, was proposed. DFTL exploits temporal locality in workloads and when low, high cache miss rates are experienced. In this paper, we propose a replication based DFTL, called RFTL, which aims at minimizing the overhead caused by miss penalty from the cached mapping table in SRAM. We developed an analytical model for studying the range of performance for RFTL. We extended EagleTree simulator to implement RFTL. Our experimental evaluation with synthetic workloads endorses the utility of RFTL showing improved performance over DFTL especially for read-dominant workloads. With 80% read dominant workload, RFTL’s cumulative distribution function shows a 20% improvement and under 80% write dominant workload, it outperforms DFTL by 10% on I/O throughput.

KW - Cached mapping table

KW - Flash memory

KW - Flash translation layer

KW - Solid-state drive

UR - http://www.scopus.com/inward/record.url?scp=85050682389&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85050682389&partnerID=8YFLogxK

U2 - 10.1007/s10586-018-2824-5

DO - 10.1007/s10586-018-2824-5

M3 - Article

AN - SCOPUS:85050682389

VL - 22

SP - 25

EP - 41

JO - Cluster Computing

JF - Cluster Computing

SN - 1386-7857

IS - 1

ER -