RSA speedup with Chinese remainder theorem immune against hardware fault cryptanalysis

Sung Ming Yen, Seung-Joo Kim, Seongan Lim, Sang J. Moon

Research output: Contribution to journalArticle

82 Citations (Scopus)

Abstract

This article considers the problem of how to prevent the fast RSA signature and decryption computation with residue number system (or called the CRT-based approach) speedup from a hardware fault cryptanalysis in a highly reliable and efficient approach. The CRT-based speedup for RSA signature has been widely adopted as an implementation standard ranging from large servers to very tiny smart IC cards. However, given a single erroneous computation result, a hardware fault cryptanalysis can totally break the RSA system by factoring the public modulus. Some countermeasures by using a simple verification function (e.g., raising a signature to the power of public key) or fault detection (e.g., an expanded modulus approach) have been reported in the literature; however, it will be pointed out in this paper that very few of these existing solutions are both sound and efficient. Unreasonably, in these methods, they assume that a comparison instruction will always be fault-free when developing countermeasures against hardware fault cryptanalysis. Researches show that the expanded modulus approach proposed by Shamir is superior to the approach of using a simple verification function when other physical cryptanalysis (e.g., timing cryptanalysis) is considered. So, we intend to improve Shamir's method. In this paper, the new concepts of fault infective CRT computation and fault infective CRT recombination are proposed. Based on the new concepts, two novel protocols are developed with rigorous proof of security. Two possible parameter settings are provided for the protocols. One setting is to select a small public key e and the proposed protocols can have comparable performance to Shamir's scheme. The other setting is to have better performance than Shamir's scheme (i.e., having comparable performance to conventional CRT speedup), but with a large public key. Most importantly, we wish to emphasize the importance of developing and proving the security of physically secure protocols without relying on unreliable or unreasonable assumptions, e.g., always fault-free instructions. In this paper, related protocols are also considered and are carefully examined to point out possible weaknesses.

Original languageEnglish
Pages (from-to)461-472
Number of pages12
JournalIEEE Transactions on Computers
Volume52
Issue number4
DOIs
Publication statusPublished - 2003 Apr 1
Externally publishedYes

Fingerprint

Chinese remainder theorem
Cathode ray tubes
Cryptanalysis
Speedup
Fault
Hardware
Network protocols
Public key
Modulus
Signature
Countermeasures
Numbering systems
Residue number System
Fault detection
Smart Card
Factoring
Servers
Fault Detection
Acoustic waves
Recombination

Keywords

  • Chinese remainder theorem (CRT)
  • Cryptography
  • Denial of service attack
  • Factorization
  • Fault detection
  • Fault infective CRT
  • Fault tolerance
  • Hardware fault cryptanalysis
  • Physical cryptanalysis
  • Residue number system
  • Side channel attack

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

Cite this

RSA speedup with Chinese remainder theorem immune against hardware fault cryptanalysis. / Yen, Sung Ming; Kim, Seung-Joo; Lim, Seongan; Moon, Sang J.

In: IEEE Transactions on Computers, Vol. 52, No. 4, 01.04.2003, p. 461-472.

Research output: Contribution to journalArticle

Yen, Sung Ming ; Kim, Seung-Joo ; Lim, Seongan ; Moon, Sang J. / RSA speedup with Chinese remainder theorem immune against hardware fault cryptanalysis. In: IEEE Transactions on Computers. 2003 ; Vol. 52, No. 4. pp. 461-472.
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