TY - JOUR
T1 - Shared-Write-Channel-Based Device for High-Density Spin-Orbit-Torque Magnetic Random-Access Memory
AU - Mishra, Rahul
AU - Kim, Taehwan
AU - Park, Jongsun
AU - Yang, Hyunsoo
N1 - Funding Information:
This work is supported by the SpOT-LITE programme (A*STAR Grant No. A18A6b0057) through RIE2020 funds and the Samsung Electronics University R&D program Grant No. IO200720-07527-01 (Exotic SOT materials and SOT characterization).
Publisher Copyright:
© 2021 American Physical Society.
PY - 2021/2
Y1 - 2021/2
N2 - Spin-orbit-torque (SOT) devices are promising candidates for the future magnetic memory landscape, as they promise high endurance, low read disturbance, and low read error, in comparison with spin-transfer torque devices. However, SOT memories are area intensive due to the requirement for two access transistors per bit. Here, we report a multibit SOT cell that has a single write channel shared among multiple bits, which enables an area-efficient memory design by reducing the number of access transistors. All combinations of digital information can be written in the multibit devices with a single current pulse. This functionality is facilitated by the electric field modulation of SOT polarity by tuning the heavy metal-ferromagnet interfacial oxidation state. Centered on the multibit devices, a shared-write-channel (SWC) memory design provides double the device density of current SOT magnetic random-access memory (MRAM). This improvement makes SOT MRAM appealing for its adoption over a wide range of memory hierarchies.
AB - Spin-orbit-torque (SOT) devices are promising candidates for the future magnetic memory landscape, as they promise high endurance, low read disturbance, and low read error, in comparison with spin-transfer torque devices. However, SOT memories are area intensive due to the requirement for two access transistors per bit. Here, we report a multibit SOT cell that has a single write channel shared among multiple bits, which enables an area-efficient memory design by reducing the number of access transistors. All combinations of digital information can be written in the multibit devices with a single current pulse. This functionality is facilitated by the electric field modulation of SOT polarity by tuning the heavy metal-ferromagnet interfacial oxidation state. Centered on the multibit devices, a shared-write-channel (SWC) memory design provides double the device density of current SOT magnetic random-access memory (MRAM). This improvement makes SOT MRAM appealing for its adoption over a wide range of memory hierarchies.
UR - http://www.scopus.com/inward/record.url?scp=85102410549&partnerID=8YFLogxK
U2 - 10.1103/PhysRevApplied.15.024063
DO - 10.1103/PhysRevApplied.15.024063
M3 - Article
AN - SCOPUS:85102410549
SN - 2331-7019
VL - 15
JO - Physical Review Applied
JF - Physical Review Applied
IS - 2
M1 - 024063
ER -