Silicon nanowire CMOS NOR logic gates featuring one-volt operation on bendable substrates

Jeongje Moon, Yoonjoong Kim, Doohyeok Lim, Sangsig Kim

Research output: Contribution to journalArticle

2 Citations (Scopus)

Abstract

In this study, we propose complementary metal-oxide−semiconductor (CMOS) NOR logic gates consisting of silicon nanowire (NW) arrays on bendable substrates. A circuit consisting of two p-channel NW field-effect transistors (NWFETs) in series and two n-channel NWFETs in parallel is constructed to operate a two-input CMOS NOR logic gate. The NOR logic gates operate at a low supply voltage of 1 V with a rail-to-rail logic swing and a high voltage gain of approximately −3.0. The exact NOR logic functionality is achieved owing to the superior electrical characteristics of the well-aligned p- and n-NWFETs, which are obtained using conventional Si-based CMOS technology. Moreover, the NOR logic gates exhibit stable characteristics and have good mechanical properties. The proposed bendable NW CMOS NOR logic gates are promising building blocks for future bendable integrated electronics. [Figure not available: see fulltext.].

Original languageEnglish
Pages (from-to)2625-2631
Number of pages7
JournalNano Research
Volume11
Issue number5
DOIs
Publication statusPublished - 2018 May 1

Keywords

  • NOR logic gate
  • bendable substrate
  • field-effect transistor
  • silicon nanowire

ASJC Scopus subject areas

  • Materials Science(all)
  • Electrical and Electronic Engineering

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