Stochastic SOT Device Based SNN Architecture for On-Chip Unsupervised STDP Learning

Yunho Jang, Gyuseong Kang, Taehwan Kim, Yeongkyo Seo, Kyung Jin Lee, Byong Guk Park, Jongsun Park

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)

Abstract

Emerging device based spiking neural network (SNN) hardware design has been actively studied. Especially, energy and area efficient synapse crossbar has been of particular interest, but processing units for weight summations in synapse crossbar are still a main bottleneck for energy and area efficient hardware design. In this paper, we propose an efficient SNN architecture with stochastic spin-orbit torque (SOT) device based multi-bit synapses. First, we present SOT device based synapse array using modified gray code. The modified gray code based synapse needs only N devices to represent 2N levels of synapse weights. Accumulative spike technique is also adopted in the proposed synapse array, to improve ADC utilization and reduce the number of neuron updates. In addition, we propose hardware friendly algorithmic techniques to improve classification accuracies as well as energy efficiencies. Non-spike depression based stochastic spike-Timing-dependent plasticity is used to reduce the overlapping input representation and classification error. Early read termination is also employed to reduce energy consumption by turning off less associated neurons. The proposed SNN processor has been implemented using 65nm CMOS process, and it shows 90% classification accuracy in MNIST dataset consuming 0.78μJ/image (training) and 0.23μJ/image (inference) of energy with an area of 1.12mm2.

Original languageEnglish
Pages (from-to)2022-2035
Number of pages14
JournalIEEE Transactions on Computers
Volume71
Issue number9
DOIs
Publication statusPublished - 2022 Sep 1

Keywords

  • Spin-orbit torque device
  • on-chip learning
  • spiking neural network
  • stochastic spike-Timing-dependent plasticity

ASJC Scopus subject areas

  • Software
  • Theoretical Computer Science
  • Hardware and Architecture
  • Computational Theory and Mathematics

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