Subthreshold degradation of gate-all-around silicon nanowire field-effect transistors: Effect of interface trap charge

B. H. Hong; N. Cho; S. J. Lee; Y. S. Yu; L. Choi; Y. C. Jung; K. H. Cho; K. H. Yeo; D. W. Kim; G. Y. Jin; K. S. Oh; D. Park; S. H. Song; J. S. Rieh; S. W. Hwang

doi:10.1109/LED.2011.2159473

Subthreshold degradation of gate-all-around silicon nanowire field-effect transistors: Effect of interface trap charge

B. H. Hong, N. Cho, S. J. Lee, Y. S. Yu, L. Choi, Y. C. Jung, K. H. Cho, K. H. Yeo, D. W. Kim, G. Y. Jin, K. S. Oh, D. Park, S. H. Song, J. S. Rieh, S. W. Hwang

School of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

22 Citations (Scopus)

Abstract

We measured and analyzed the subthreshold degradation of the gate-all-around (GAA) silicon nanowire field-effect transistors with the length of 300/500 nm and the radius of 5 nm. An analytical model incorporating the effect of interface traps quantitatively explained the measured subthreshold swing (SS) degradation. A simple electrostatic argument showed that the GAA device had smaller degradation of SS values than planar devices for the same interface trap densities.

Original language	English
Article number	5944946
Pages (from-to)	1179-1181
Number of pages	3
Journal	IEEE Electron Device Letters
Volume	32
Issue number	9
DOIs	https://doi.org/10.1109/LED.2011.2159473
Publication status	Published - 2011 Sep

Keywords

Gate-all-around (GAA)
interface trap charge
silicon nanowire field-effect transistor (SNWFET)
subthreshold degradation

ASJC Scopus subject areas

Electronic, Optical and Magnetic Materials
Electrical and Electronic Engineering

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10.1109/LED.2011.2159473

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Hong, B. H., Cho, N., Lee, S. J., Yu, Y. S., Choi, L., Jung, Y. C., Cho, K. H., Yeo, K. H., Kim, D. W., Jin, G. Y., Oh, K. S., Park, D., Song, S. H., Rieh, J. S., & Hwang, S. W. (2011). Subthreshold degradation of gate-all-around silicon nanowire field-effect transistors: Effect of interface trap charge. IEEE Electron Device Letters, 32(9), 1179-1181. [5944946]. https://doi.org/10.1109/LED.2011.2159473

Hong, BH, Cho, N, Lee, SJ, Yu, YS, Choi, L, Jung, YC, Cho, KH, Yeo, KH, Kim, DW, Jin, GY, Oh, KS, Park, D, Song, SH, Rieh, JS & Hwang, SW 2011, 'Subthreshold degradation of gate-all-around silicon nanowire field-effect transistors: Effect of interface trap charge', IEEE Electron Device Letters, vol. 32, no. 9, 5944946, pp. 1179-1181. https://doi.org/10.1109/LED.2011.2159473

@article{cb8d910900224380ae7b8fa981567872,

title = "Subthreshold degradation of gate-all-around silicon nanowire field-effect transistors: Effect of interface trap charge",

abstract = "We measured and analyzed the subthreshold degradation of the gate-all-around (GAA) silicon nanowire field-effect transistors with the length of 300/500 nm and the radius of 5 nm. An analytical model incorporating the effect of interface traps quantitatively explained the measured subthreshold swing (SS) degradation. A simple electrostatic argument showed that the GAA device had smaller degradation of SS values than planar devices for the same interface trap densities.",

keywords = "Gate-all-around (GAA), interface trap charge, silicon nanowire field-effect transistor (SNWFET), subthreshold degradation",

author = "Hong, {B. H.} and N. Cho and Lee, {S. J.} and Yu, {Y. S.} and L. Choi and Jung, {Y. C.} and Cho, {K. H.} and Yeo, {K. H.} and Kim, {D. W.} and Jin, {G. Y.} and Oh, {K. S.} and D. Park and Song, {S. H.} and Rieh, {J. S.} and Hwang, {S. W.}",

note = "Funding Information: Manuscript received April 14, 2010; revised May 22, 2011; accepted June 4, 2011. Date of publication July 12, 2011; date of current version August 24, 2011. This work was supported by the National Research Foundation of Korea grant funded by the Korea government (MEST) under Grant 2011-0000427. The work of S. W. Hwang was supported by Korea University. The review of this letter was arranged by Editor J. Cai.",

year = "2011",

month = sep,

doi = "10.1109/LED.2011.2159473",

language = "English",

volume = "32",

pages = "1179--1181",

journal = "IEEE Electron Device Letters",

issn = "0741-3106",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "9",

}

TY - JOUR

T1 - Subthreshold degradation of gate-all-around silicon nanowire field-effect transistors

T2 - Effect of interface trap charge

AU - Hong, B. H.

AU - Cho, N.

AU - Lee, S. J.

AU - Yu, Y. S.

AU - Choi, L.

AU - Jung, Y. C.

AU - Cho, K. H.

AU - Yeo, K. H.

AU - Kim, D. W.

AU - Jin, G. Y.

AU - Oh, K. S.

AU - Park, D.

AU - Song, S. H.

AU - Rieh, J. S.

AU - Hwang, S. W.

N1 - Funding Information: Manuscript received April 14, 2010; revised May 22, 2011; accepted June 4, 2011. Date of publication July 12, 2011; date of current version August 24, 2011. This work was supported by the National Research Foundation of Korea grant funded by the Korea government (MEST) under Grant 2011-0000427. The work of S. W. Hwang was supported by Korea University. The review of this letter was arranged by Editor J. Cai.

PY - 2011/9

Y1 - 2011/9

N2 - We measured and analyzed the subthreshold degradation of the gate-all-around (GAA) silicon nanowire field-effect transistors with the length of 300/500 nm and the radius of 5 nm. An analytical model incorporating the effect of interface traps quantitatively explained the measured subthreshold swing (SS) degradation. A simple electrostatic argument showed that the GAA device had smaller degradation of SS values than planar devices for the same interface trap densities.

AB - We measured and analyzed the subthreshold degradation of the gate-all-around (GAA) silicon nanowire field-effect transistors with the length of 300/500 nm and the radius of 5 nm. An analytical model incorporating the effect of interface traps quantitatively explained the measured subthreshold swing (SS) degradation. A simple electrostatic argument showed that the GAA device had smaller degradation of SS values than planar devices for the same interface trap densities.

KW - Gate-all-around (GAA)

KW - interface trap charge

KW - silicon nanowire field-effect transistor (SNWFET)

KW - subthreshold degradation

UR - http://www.scopus.com/inward/record.url?scp=80052037094&partnerID=8YFLogxK

U2 - 10.1109/LED.2011.2159473

DO - 10.1109/LED.2011.2159473

M3 - Article

AN - SCOPUS:80052037094

VL - 32

SP - 1179

EP - 1181

JO - IEEE Electron Device Letters

JF - IEEE Electron Device Letters

SN - 0741-3106

IS - 9

M1 - 5944946

ER -

Subthreshold degradation of gate-all-around silicon nanowire field-effect transistors: Effect of interface trap charge

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