Testing of timer function blocks in FBD

Eunkyoung Jee, Seungjae Jeon, Hojung Bang, Sungdeok Cha, Junbeom Yoo, Geeyong Park, Keechoon Kwon

Research output: Chapter in Book/Report/Conference proceedingConference contribution

7 Citations (Scopus)


Testing for time-related behaviors of PLC software is important and should be performed carefully. We propose a structural testing technique on Function Block Diagram(FBD) networks including timer function blocks. In order to test FBD networks including timer function blocks, we generate templates for timer function blocks and transform a unit FBD into a flow-graph using the proposed templates. We apply existing testing techniques to the generated flowgraph and describe how the characteristics of timer function blocks are reflected in the testing process. By the proposed method, FBD networks including timer function blocks can be tested thoroughly without the intermediate code which was essential in the previous FBD testing. To demonstrate the effectiveness of the proposed method, we use a trip logic of bistable processor of digital plant protection systems which is being developed in Korea.

Original languageEnglish
Title of host publicationProceedings - APSEC 2006
Subtitle of host publicationAsia-Pacific Software Engineering Conference
Number of pages8
Publication statusPublished - 2006
Externally publishedYes
EventAPSEC 2006: Asia-Pacific Software Engineering Conference - Bangalore, India
Duration: 2006 Dec 62006 Dec 8

Publication series

NameProceedings - Asia-Pacific Software Engineering Conference, APSEC
ISSN (Print)1530-1362


OtherAPSEC 2006: Asia-Pacific Software Engineering Conference

ASJC Scopus subject areas

  • Engineering(all)


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