The electrical characteristics of high density arrays of silicon nanowire field-effect transistors: Dependence on wire spacing

Hye Young Kim, Kangho Lee, Jae Woo Lee, Sangwook Kim, Gyu-Tae Kim, Georg S. Duesberg

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Since the introduction of silicon nanowire field-effect transistors (SiNW FETs) as a new technology for highly integrated circuits, their scaling behavior has been of crucial importance for the continuation of Moore's law. To date most studies have been of a theoretical nature, as small wire spacing is difficult to achieve experimentally. Here we successfully fabricated and investigated arrays of sub 20 nm SiNW FETs with wire spacing as small as 30 nm for the first time. The channels are contacted using global buried Si electrodes. Using the wafer as the back gate an investigation of the electrical performance of an array of SiNW FETs was undertaken. These experimental observations are supported by simulations using FlexPED.

Original languageEnglish
Title of host publicationProceedings of the IEEE Conference on Nanotechnology
Pages384-388
Number of pages5
DOIs
Publication statusPublished - 2013 Dec 1
Event2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013 - Beijing, China
Duration: 2013 Aug 52013 Aug 8

Other

Other2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013
CountryChina
CityBeijing
Period13/8/513/8/8

Fingerprint

Silicon
Field effect transistors
Nanowires
nanowires
field effect transistors
spacing
wire
Wire
silicon
integrated circuits
Integrated circuits
wafers
scaling
Electrodes
electrodes
simulation

ASJC Scopus subject areas

  • Bioengineering
  • Electrical and Electronic Engineering
  • Materials Chemistry
  • Condensed Matter Physics

Cite this

Kim, H. Y., Lee, K., Lee, J. W., Kim, S., Kim, G-T., & Duesberg, G. S. (2013). The electrical characteristics of high density arrays of silicon nanowire field-effect transistors: Dependence on wire spacing. In Proceedings of the IEEE Conference on Nanotechnology (pp. 384-388). [6720834] https://doi.org/10.1109/NANO.2013.6720834

The electrical characteristics of high density arrays of silicon nanowire field-effect transistors : Dependence on wire spacing. / Kim, Hye Young; Lee, Kangho; Lee, Jae Woo; Kim, Sangwook; Kim, Gyu-Tae; Duesberg, Georg S.

Proceedings of the IEEE Conference on Nanotechnology. 2013. p. 384-388 6720834.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Kim, HY, Lee, K, Lee, JW, Kim, S, Kim, G-T & Duesberg, GS 2013, The electrical characteristics of high density arrays of silicon nanowire field-effect transistors: Dependence on wire spacing. in Proceedings of the IEEE Conference on Nanotechnology., 6720834, pp. 384-388, 2013 13th IEEE International Conference on Nanotechnology, IEEE-NANO 2013, Beijing, China, 13/8/5. https://doi.org/10.1109/NANO.2013.6720834
Kim HY, Lee K, Lee JW, Kim S, Kim G-T, Duesberg GS. The electrical characteristics of high density arrays of silicon nanowire field-effect transistors: Dependence on wire spacing. In Proceedings of the IEEE Conference on Nanotechnology. 2013. p. 384-388. 6720834 https://doi.org/10.1109/NANO.2013.6720834
Kim, Hye Young ; Lee, Kangho ; Lee, Jae Woo ; Kim, Sangwook ; Kim, Gyu-Tae ; Duesberg, Georg S. / The electrical characteristics of high density arrays of silicon nanowire field-effect transistors : Dependence on wire spacing. Proceedings of the IEEE Conference on Nanotechnology. 2013. pp. 384-388
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