Timing analysis of superscalar processor programs using ACSR

Jin Young Choi, Insup Lee, Inhye Kang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

This paper illustrates a formal technique for describing the timing properties and resource constraints of pipelined superscalar processor instructions at high level. Superscalar processors can issue and execute multiple instructions simultaneously. The degree of parallelism depends on the multiplicity of hardware functional units as well as data dependencies among instructions. Thus, the timing properties of a superscalar program is difficult to analyze and predict. We describe how to model the instruction-level architecture of a superscalar processor using ACSR and how to derive the temporal behavior of an assembly program using the ACSR laws. The salient aspect of ACSR is that the notions of time, resources and priorities are supported directly in the algebra. Our approach is to model superscalar processor registers as ACSR resources, instructions as ACSR processes, and use ACSR priorities to achieve maximum possible instruction-level parallelism.

Original languageEnglish
Title of host publicationProceedings of the IEEE Workshop on Real-Time Operating Systems and Software
Place of PublicationLos Alamitos, CA, United States
PublisherPubl by IEEE
Pages63-67
Number of pages5
ISBN (Print)0818657103
Publication statusPublished - 1994 Jan 1
Externally publishedYes
EventProceedings of the 11th IEEE Workshop on Real-Time Operating Systems and Software - Seattle, WA, USA
Duration: 1994 May 181994 May 19

Other

OtherProceedings of the 11th IEEE Workshop on Real-Time Operating Systems and Software
CitySeattle, WA, USA
Period94/5/1894/5/19

Fingerprint

Program processors
Program assemblers
Algebra
Hardware

ASJC Scopus subject areas

  • Software

Cite this

Choi, J. Y., Lee, I., & Kang, I. (1994). Timing analysis of superscalar processor programs using ACSR. In Proceedings of the IEEE Workshop on Real-Time Operating Systems and Software (pp. 63-67). Los Alamitos, CA, United States: Publ by IEEE.

Timing analysis of superscalar processor programs using ACSR. / Choi, Jin Young; Lee, Insup; Kang, Inhye.

Proceedings of the IEEE Workshop on Real-Time Operating Systems and Software. Los Alamitos, CA, United States : Publ by IEEE, 1994. p. 63-67.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Choi, JY, Lee, I & Kang, I 1994, Timing analysis of superscalar processor programs using ACSR. in Proceedings of the IEEE Workshop on Real-Time Operating Systems and Software. Publ by IEEE, Los Alamitos, CA, United States, pp. 63-67, Proceedings of the 11th IEEE Workshop on Real-Time Operating Systems and Software, Seattle, WA, USA, 94/5/18.
Choi JY, Lee I, Kang I. Timing analysis of superscalar processor programs using ACSR. In Proceedings of the IEEE Workshop on Real-Time Operating Systems and Software. Los Alamitos, CA, United States: Publ by IEEE. 1994. p. 63-67
Choi, Jin Young ; Lee, Insup ; Kang, Inhye. / Timing analysis of superscalar processor programs using ACSR. Proceedings of the IEEE Workshop on Real-Time Operating Systems and Software. Los Alamitos, CA, United States : Publ by IEEE, 1994. pp. 63-67
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