Abstract
In this article, we present a transposable three-transistor static random access memory (3T-SRAM) array consisting of independent double-gate feedback field-effect transistors as binary synaptic devices and access transistors. The synaptic functions of the 2×2 SRAM array are investigated through mixed-mode technology computer-aided design simulations. This 3T-SRAM array provides parallel and bidirectional synaptic updates with fast operating speed. Furthermore, a simplified spike-timing-dependent plasticity learning rule is implemented by adjusting the widths of memory pulses. A compact cell area and a low-leakage power consumption allow this 3T-SRAM array to be used for adaptive synaptic devices in a large-scale neuromorphic system.
Original language | English |
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Article number | 8836627 |
Pages (from-to) | 4753-4758 |
Number of pages | 6 |
Journal | IEEE Transactions on Electron Devices |
Volume | 66 |
Issue number | 11 |
DOIs | |
Publication status | Published - 2019 Nov |
Keywords
- Double-gate
- feedback field-effect transistors (FBFETs)
- static random access memory (SRAM)
- synapse device
- transposable memory
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering