Variation of poly-Si grain structures under thermal annealing and its effect on the performance of TiN/Al2O3/Si3N4/SiO2/poly-Si capacitors

Suk Bum Hong, Ju Hyun Park, Tae Ho Lee, Jun Hee Lim, Changhwan Shin, Young Woo Park, Tae Geun Kim

Research output: Contribution to journalArticle

Abstract

This study presents the improved memory properties of TiN/Al2O3/Si3N4/SiO2/poly-Si (TANOS) capacitors after rapid thermal annealing (RTA) and high-pressure annealing processes (HPAP) using H2 and D2 molecules. First, it was confirmed that the recrystallization rate, and thus the grain size of the poly-silicon (poly-Si) film, increased with an increase of the RTA temperature, eventually improving the performance of the TANOS capacitor by reducing the trap densities at the poly-Si/SiO2 interface. Then, it was found that device performance parameters, such as program/erase speed and data retention, could be further improved through HPAP owing to the passivation of band gap states at the poly-Si channel grain boundary. Finally, it was confirmed that these improvements can be observed at a transistor level in the same fashion using the Silvaco TCAD simulation.

Original languageEnglish
JournalApplied Surface Science
DOIs
Publication statusAccepted/In press - 2017 Jan 1

Keywords

  • Grain boundary
  • Interface trap
  • Poly-silicon channel
  • Rapid thermal annealing
  • TANOS

ASJC Scopus subject areas

  • Surfaces, Coatings and Films

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