Variation of poly-Si grain structures under thermal annealing and its effect on the performance of TiN/Al2O3/Si3N4/SiO2/poly-Si capacitors

Suk Bum Hong, Ju Hyun Park, Tae Ho Lee, Jun Hee Lim, Changhwan Shin, Young Woo Park, Tae Geun Kim

Research output: Contribution to journalArticle

Abstract

This study presents the improved memory properties of TiN/Al2O3/Si3N4/SiO2/poly-Si (TANOS) capacitors after rapid thermal annealing (RTA) and high-pressure annealing processes (HPAP) using H2 and D2 molecules. First, it was confirmed that the recrystallization rate, and thus the grain size of the poly-silicon (poly-Si) film, increased with an increase of the RTA temperature, eventually improving the performance of the TANOS capacitor by reducing the trap densities at the poly-Si/SiO2 interface. Then, it was found that device performance parameters, such as program/erase speed and data retention, could be further improved through HPAP owing to the passivation of band gap states at the poly-Si channel grain boundary. Finally, it was confirmed that these improvements can be observed at a transistor level in the same fashion using the Silvaco TCAD simulation.

Original languageEnglish
JournalApplied Surface Science
DOIs
Publication statusAccepted/In press - 2017 Jan 1

Fingerprint

Crystal microstructure
Polysilicon
Capacitors
Annealing
Rapid thermal annealing
Silicon
Passivation
Transistors
Grain boundaries
Energy gap
Hot Temperature
silicon nitride
Data storage equipment
Molecules
Temperature

Keywords

  • Grain boundary
  • Interface trap
  • Poly-silicon channel
  • Rapid thermal annealing
  • TANOS

ASJC Scopus subject areas

  • Surfaces, Coatings and Films

Cite this

Variation of poly-Si grain structures under thermal annealing and its effect on the performance of TiN/Al2O3/Si3N4/SiO2/poly-Si capacitors. / Hong, Suk Bum; Park, Ju Hyun; Lee, Tae Ho; Lim, Jun Hee; Shin, Changhwan; Park, Young Woo; Kim, Tae Geun.

In: Applied Surface Science, 01.01.2017.

Research output: Contribution to journalArticle

@article{093ed48bf8eb4e3fb097f5ef936686e2,
title = "Variation of poly-Si grain structures under thermal annealing and its effect on the performance of TiN/Al2O3/Si3N4/SiO2/poly-Si capacitors",
abstract = "This study presents the improved memory properties of TiN/Al2O3/Si3N4/SiO2/poly-Si (TANOS) capacitors after rapid thermal annealing (RTA) and high-pressure annealing processes (HPAP) using H2 and D2 molecules. First, it was confirmed that the recrystallization rate, and thus the grain size of the poly-silicon (poly-Si) film, increased with an increase of the RTA temperature, eventually improving the performance of the TANOS capacitor by reducing the trap densities at the poly-Si/SiO2 interface. Then, it was found that device performance parameters, such as program/erase speed and data retention, could be further improved through HPAP owing to the passivation of band gap states at the poly-Si channel grain boundary. Finally, it was confirmed that these improvements can be observed at a transistor level in the same fashion using the Silvaco TCAD simulation.",
keywords = "Grain boundary, Interface trap, Poly-silicon channel, Rapid thermal annealing, TANOS",
author = "Hong, {Suk Bum} and Park, {Ju Hyun} and Lee, {Tae Ho} and Lim, {Jun Hee} and Changhwan Shin and Park, {Young Woo} and Kim, {Tae Geun}",
year = "2017",
month = "1",
day = "1",
doi = "10.1016/j.apsusc.2017.11.226",
language = "English",
journal = "Applied Surface Science",
issn = "0169-4332",
publisher = "Elsevier",

}

TY - JOUR

T1 - Variation of poly-Si grain structures under thermal annealing and its effect on the performance of TiN/Al2O3/Si3N4/SiO2/poly-Si capacitors

AU - Hong, Suk Bum

AU - Park, Ju Hyun

AU - Lee, Tae Ho

AU - Lim, Jun Hee

AU - Shin, Changhwan

AU - Park, Young Woo

AU - Kim, Tae Geun

PY - 2017/1/1

Y1 - 2017/1/1

N2 - This study presents the improved memory properties of TiN/Al2O3/Si3N4/SiO2/poly-Si (TANOS) capacitors after rapid thermal annealing (RTA) and high-pressure annealing processes (HPAP) using H2 and D2 molecules. First, it was confirmed that the recrystallization rate, and thus the grain size of the poly-silicon (poly-Si) film, increased with an increase of the RTA temperature, eventually improving the performance of the TANOS capacitor by reducing the trap densities at the poly-Si/SiO2 interface. Then, it was found that device performance parameters, such as program/erase speed and data retention, could be further improved through HPAP owing to the passivation of band gap states at the poly-Si channel grain boundary. Finally, it was confirmed that these improvements can be observed at a transistor level in the same fashion using the Silvaco TCAD simulation.

AB - This study presents the improved memory properties of TiN/Al2O3/Si3N4/SiO2/poly-Si (TANOS) capacitors after rapid thermal annealing (RTA) and high-pressure annealing processes (HPAP) using H2 and D2 molecules. First, it was confirmed that the recrystallization rate, and thus the grain size of the poly-silicon (poly-Si) film, increased with an increase of the RTA temperature, eventually improving the performance of the TANOS capacitor by reducing the trap densities at the poly-Si/SiO2 interface. Then, it was found that device performance parameters, such as program/erase speed and data retention, could be further improved through HPAP owing to the passivation of band gap states at the poly-Si channel grain boundary. Finally, it was confirmed that these improvements can be observed at a transistor level in the same fashion using the Silvaco TCAD simulation.

KW - Grain boundary

KW - Interface trap

KW - Poly-silicon channel

KW - Rapid thermal annealing

KW - TANOS

UR - http://www.scopus.com/inward/record.url?scp=85036529770&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=85036529770&partnerID=8YFLogxK

U2 - 10.1016/j.apsusc.2017.11.226

DO - 10.1016/j.apsusc.2017.11.226

M3 - Article

AN - SCOPUS:85036529770

JO - Applied Surface Science

JF - Applied Surface Science

SN - 0169-4332

ER -