TY - JOUR
T1 - Variation of poly-Si grain structures under thermal annealing and its effect on the performance of TiN/Al2O3/Si3N4/SiO2/poly-Si capacitors
AU - Hong, Suk Bum
AU - Park, Ju Hyun
AU - Lee, Tae Ho
AU - Lim, Jun Hee
AU - Shin, Changhwan
AU - Park, Young Woo
AU - Kim, Tae Geun
PY - 2017/1/1
Y1 - 2017/1/1
N2 - This study presents the improved memory properties of TiN/Al2O3/Si3N4/SiO2/poly-Si (TANOS) capacitors after rapid thermal annealing (RTA) and high-pressure annealing processes (HPAP) using H2 and D2 molecules. First, it was confirmed that the recrystallization rate, and thus the grain size of the poly-silicon (poly-Si) film, increased with an increase of the RTA temperature, eventually improving the performance of the TANOS capacitor by reducing the trap densities at the poly-Si/SiO2 interface. Then, it was found that device performance parameters, such as program/erase speed and data retention, could be further improved through HPAP owing to the passivation of band gap states at the poly-Si channel grain boundary. Finally, it was confirmed that these improvements can be observed at a transistor level in the same fashion using the Silvaco TCAD simulation.
AB - This study presents the improved memory properties of TiN/Al2O3/Si3N4/SiO2/poly-Si (TANOS) capacitors after rapid thermal annealing (RTA) and high-pressure annealing processes (HPAP) using H2 and D2 molecules. First, it was confirmed that the recrystallization rate, and thus the grain size of the poly-silicon (poly-Si) film, increased with an increase of the RTA temperature, eventually improving the performance of the TANOS capacitor by reducing the trap densities at the poly-Si/SiO2 interface. Then, it was found that device performance parameters, such as program/erase speed and data retention, could be further improved through HPAP owing to the passivation of band gap states at the poly-Si channel grain boundary. Finally, it was confirmed that these improvements can be observed at a transistor level in the same fashion using the Silvaco TCAD simulation.
KW - Grain boundary
KW - Interface trap
KW - Poly-silicon channel
KW - Rapid thermal annealing
KW - TANOS
UR - http://www.scopus.com/inward/record.url?scp=85036529770&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85036529770&partnerID=8YFLogxK
U2 - 10.1016/j.apsusc.2017.11.226
DO - 10.1016/j.apsusc.2017.11.226
M3 - Article
AN - SCOPUS:85036529770
JO - Applied Surface Science
JF - Applied Surface Science
SN - 0169-4332
ER -