Abstract
In this study, a NOR-logic circuit is constructed by the vertical stacking of three individual thin-film transistors (TFTs) with the channels of solutionprocessed chalcogenide nanoparticle (NP) films on a plastic substrate. The NOR-logic circuit consists of two p-type HgTe NP-based TFTs, which act as drivers, and one n-type HgSe NP-based TFT, which plays the role of an active load. The logic operation is observed with a substantial difference in V out between the logic state of "00" and the other logic states, and the logic swing is >60%.
| Original language | English |
|---|---|
| Article number | 08NE02 |
| Journal | Japanese Journal of Applied Physics |
| Volume | 53 |
| Issue number | 8 SPEC. ISSUE 3 |
| DOIs | |
| Publication status | Published - 2014 Jan 1 |
ASJC Scopus subject areas
- Engineering(all)
- Physics and Astronomy(all)
Fingerprint Dive into the research topics of 'Vertical NOR-logic circuits constructed using nanoparticle films on plastic substrates'. Together they form a unique fingerprint.
Cite this
Choi, J., Yun, J., Cho, K., & Kim, S. (2014). Vertical NOR-logic circuits constructed using nanoparticle films on plastic substrates. Japanese Journal of Applied Physics, 53(8 SPEC. ISSUE 3), [08NE02]. https://doi.org/10.7567/JJAP.53.08NE02