Wired-OR property and improved structure of recovered energy logic (REL)

Chulwoo Kim; Soowon Kim

doi:10.1049/ip-cds:19971288

Wired-OR property and improved structure of recovered energy logic (REL)

Research output: Contribution to journal › Article › peer-review

Abstract

A modified MOS REL structure, which explores the wired-OR property and enhances speed and power characteristics, is proposed. Proposed MOS REL gates have been fabricated and tested. It is shown that the power x delay of the MOS REL inverter is enhanced by 26% with less silicon area. Recovered energy logic, \Virctl-OR property, Adiabatic logic, Inverters

Original language	English
Pages (from-to)	378-380
Number of pages	3
Journal	IEE Proceedings: Circuits, Devices and Systems
Volume	144
Issue number	6
DOIs	https://doi.org/10.1049/ip-cds:19971288
Publication status	Published - 1997

ASJC Scopus subject areas

Electrical and Electronic Engineering

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10.1049/ip-cds:19971288

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abstract = "A modified MOS REL structure, which explores the wired-OR property and enhances speed and power characteristics, is proposed. Proposed MOS REL gates have been fabricated and tested. It is shown that the power x delay of the MOS REL inverter is enhanced by 26% with less silicon area. Recovered energy logic, \Virctl-OR property, Adiabatic logic, Inverters",

author = "Chulwoo Kim and Soowon Kim",

year = "1997",

doi = "10.1049/ip-cds:19971288",

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AB - A modified MOS REL structure, which explores the wired-OR property and enhances speed and power characteristics, is proposed. Proposed MOS REL gates have been fabricated and tested. It is shown that the power x delay of the MOS REL inverter is enhanced by 26% with less silicon area. Recovered energy logic, \Virctl-OR property, Adiabatic logic, Inverters

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Wired-OR property and improved structure of recovered energy logic (REL)

Abstract

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