Wired-OR property and improved structure of recovered energy logic (REL)

Research output: Chapter in Book/Report/Conference proceedingChapter

Abstract

A modified MOS REL structure, which explores the wired-OR property and enhances speed and power characteristics, is proposed. Proposed MOS REL gates have been fabricated and tested. It is shown that the power x delay of the MOS REL inverter is enhanced by 26% with less silicon area. Recovered energy logic, \Virctl-OR property, Adiabatic logic, Inverters

Original languageEnglish
Title of host publicationIEE Proceedings: Circuits, Devices and Systems
Pages378-380
Number of pages3
Volume144
Edition6
Publication statusPublished - 1997

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Logic gates
Silicon

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Kim, C., & Kim, S-W. (1997). Wired-OR property and improved structure of recovered energy logic (REL). In IEE Proceedings: Circuits, Devices and Systems (6 ed., Vol. 144, pp. 378-380)

Wired-OR property and improved structure of recovered energy logic (REL). / Kim, Chulwoo; Kim, Soo-Won.

IEE Proceedings: Circuits, Devices and Systems. Vol. 144 6. ed. 1997. p. 378-380.

Research output: Chapter in Book/Report/Conference proceedingChapter

Kim, C & Kim, S-W 1997, Wired-OR property and improved structure of recovered energy logic (REL). in IEE Proceedings: Circuits, Devices and Systems. 6 edn, vol. 144, pp. 378-380.
Kim C, Kim S-W. Wired-OR property and improved structure of recovered energy logic (REL). In IEE Proceedings: Circuits, Devices and Systems. 6 ed. Vol. 144. 1997. p. 378-380
Kim, Chulwoo ; Kim, Soo-Won. / Wired-OR property and improved structure of recovered energy logic (REL). IEE Proceedings: Circuits, Devices and Systems. Vol. 144 6. ed. 1997. pp. 378-380
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