Wired-OR property and improved structure of recovered energy logic (REL)

Chulwoo Kim, Soowon Kim

Research output: Contribution to journalArticle

Abstract

A modified MOS REL structure is proposed, which exhibits the wired-OR property and enhances speed and power characteristics. Proposed MOS REL gates have been fabricated and tested. It is shown that the power x delay product of an MOS REL inverter is enhanced by 26% with a smaller silicon area.

Original languageEnglish
Pages (from-to)760-762
Number of pages3
JournalElectronics Letters
Volume33
Issue number9
DOIs
Publication statusPublished - 1997 Apr 24

Keywords

  • Logic circuits
  • Logic design

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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