WR-1.5 High-Power Frequency Doubler in 130-nm InP HBT Technology

Iljin Lee; Sanggeun Jeon

doi:10.1109/LMWC.2020.2980672

WR-1.5 High-Power Frequency Doubler in 130-nm InP HBT Technology

Iljin Lee, Sanggeun Jeon

School of Electrical Engineering

Research output: Contribution to journal › Article › peer-review

3 Citations (Scopus)

Abstract

This letter presents a WR-1.5 frequency doubler implemented in a 130-nm InP heterojunction-bipolar-transistor (HBT) technology. The doubler core uses a differential common-emitter transistor to improve the stability and to ease the fundamental suppression. The output power is maximized by the source-pull and load-pull simulation. The input and output matching to the optimum impedance is implemented using a single transmission line. This simple matching structure reduces the modeling inaccuracy and the passive component loss at the terahertz frequencies. The output power of the doubler was measured in the frequency range of 590-610 GHz. The doubler exhibits the maximum output power of -5 dBm and conversion loss of 14 dB at 590 GHz without additional drive amplifiers.

Original language	English
Article number	9046000
Pages (from-to)	504-507
Number of pages	4
Journal	IEEE Microwave and Wireless Components Letters
Volume	30
Issue number	5
DOIs	https://doi.org/10.1109/LMWC.2020.2980672
Publication status	Published - 2020 May

Keywords

Frequency doubler
InP heterojunction-bipolar transistor (HBT) technology
WR-15 band
terahertz

ASJC Scopus subject areas

Condensed Matter Physics
Electrical and Electronic Engineering

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10.1109/LMWC.2020.2980672

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title = "WR-1.5 High-Power Frequency Doubler in 130-nm InP HBT Technology",

abstract = "This letter presents a WR-1.5 frequency doubler implemented in a 130-nm InP heterojunction-bipolar-transistor (HBT) technology. The doubler core uses a differential common-emitter transistor to improve the stability and to ease the fundamental suppression. The output power is maximized by the source-pull and load-pull simulation. The input and output matching to the optimum impedance is implemented using a single transmission line. This simple matching structure reduces the modeling inaccuracy and the passive component loss at the terahertz frequencies. The output power of the doubler was measured in the frequency range of 590-610 GHz. The doubler exhibits the maximum output power of -5 dBm and conversion loss of 14 dB at 590 GHz without additional drive amplifiers.",

keywords = "Frequency doubler, InP heterojunction-bipolar transistor (HBT) technology, WR-15 band, terahertz",

author = "Iljin Lee and Sanggeun Jeon",

note = "Funding Information: Manuscript received January 9, 2020; revised February 27, 2020; accepted March 10, 2020. Date of publication March 24, 2020; date of current version May 8, 2020. This work was supported by the Institute of Information & Communications Technology Planning & Evaluation (IITP) grant funded by the Korea government (MSIT) under Grant 2016-0-00185. (Corresponding author: Sanggeun Jeon.) The authors are with the School of Electrical Engineering, Korea University, Seoul 02841, South Korea (e-mail: sgjeon@korea.ac.kr). Publisher Copyright: {\textcopyright} 2001-2012 IEEE.",

year = "2020",

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doi = "10.1109/LMWC.2020.2980672",

language = "English",

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pages = "504--507",

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AU - Lee, Iljin

AU - Jeon, Sanggeun

N1 - Funding Information: Manuscript received January 9, 2020; revised February 27, 2020; accepted March 10, 2020. Date of publication March 24, 2020; date of current version May 8, 2020. This work was supported by the Institute of Information & Communications Technology Planning & Evaluation (IITP) grant funded by the Korea government (MSIT) under Grant 2016-0-00185. (Corresponding author: Sanggeun Jeon.) The authors are with the School of Electrical Engineering, Korea University, Seoul 02841, South Korea (e-mail: sgjeon@korea.ac.kr). Publisher Copyright: © 2001-2012 IEEE.

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N2 - This letter presents a WR-1.5 frequency doubler implemented in a 130-nm InP heterojunction-bipolar-transistor (HBT) technology. The doubler core uses a differential common-emitter transistor to improve the stability and to ease the fundamental suppression. The output power is maximized by the source-pull and load-pull simulation. The input and output matching to the optimum impedance is implemented using a single transmission line. This simple matching structure reduces the modeling inaccuracy and the passive component loss at the terahertz frequencies. The output power of the doubler was measured in the frequency range of 590-610 GHz. The doubler exhibits the maximum output power of -5 dBm and conversion loss of 14 dB at 590 GHz without additional drive amplifiers.

AB - This letter presents a WR-1.5 frequency doubler implemented in a 130-nm InP heterojunction-bipolar-transistor (HBT) technology. The doubler core uses a differential common-emitter transistor to improve the stability and to ease the fundamental suppression. The output power is maximized by the source-pull and load-pull simulation. The input and output matching to the optimum impedance is implemented using a single transmission line. This simple matching structure reduces the modeling inaccuracy and the passive component loss at the terahertz frequencies. The output power of the doubler was measured in the frequency range of 590-610 GHz. The doubler exhibits the maximum output power of -5 dBm and conversion loss of 14 dB at 590 GHz without additional drive amplifiers.

KW - Frequency doubler

KW - InP heterojunction-bipolar transistor (HBT) technology

KW - WR-15 band

KW - terahertz

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JO - IEEE Microwave and Wireless Components Letters

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ER -

WR-1.5 High-Power Frequency Doubler in 130-nm InP HBT Technology

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Keywords

ASJC Scopus subject areas

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