Writing Current Reduction for High-Density Phase-Change RAM

Y. N. Hwang, S. H. Lee, S. J. Ahn, S. Y. Lee, K. C. Ryoo, H. S. Hong, Hyun Cheol Koo, F. Yeung, J. H. Oh, H. J. Kim, W. C. Jeong, J. H. Park, H. Horii, Y. H. Ha, J. H. Yi, G. H. Koh, G. T. Jeong, H. S. Jeong, Kinam Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

76 Citations (Scopus)

Abstract

By developing a chalcogenide memory element that can be operated at low writing current, we have demonstrated the possibility of high-density phase-change random access memory. We have investigated the phase transition behaviors in function of various process factors including contact size, cell size and thickness, doping concentration in chalcogenide material and cell structure. As a result, we have observed that the writing current is reduced down to 0.7mA.

Original languageEnglish
Title of host publicationTechnical Digest - International Electron Devices Meeting
Pages893-896
Number of pages4
Publication statusPublished - 2003
Externally publishedYes
EventIEEE International Electron Devices Meeting - Washington, DC, United States
Duration: 2003 Dec 82003 Dec 10

Other

OtherIEEE International Electron Devices Meeting
CountryUnited States
CityWashington, DC
Period03/12/803/12/10

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Hwang, Y. N., Lee, S. H., Ahn, S. J., Lee, S. Y., Ryoo, K. C., Hong, H. S., Koo, H. C., Yeung, F., Oh, J. H., Kim, H. J., Jeong, W. C., Park, J. H., Horii, H., Ha, Y. H., Yi, J. H., Koh, G. H., Jeong, G. T., Jeong, H. S., & Kim, K. (2003). Writing Current Reduction for High-Density Phase-Change RAM. In Technical Digest - International Electron Devices Meeting (pp. 893-896)